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Lxp32.github.io : The LXP32 Processor
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The LXP32 Processor
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A lightweight, open source and FPGA-friendly 32-bit soft processor IP core based on an original instruction set.
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A lightweight, open source and FPGA-friendly 32-bit soft processor IP core based on an original instruction set.
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The LXP32 Processor Download Documentation Development Links License LXP32 is a lightweight, open source and FPGA-friendly 32-bit CPU IP core A soft processor core based on a simple, original instruction set designed for efficient FPGA implementation Features Portable Described in behavioral VHDL Easily integrated into Verilog and VHDL based designs Usable on virtually any FPGA, not tied to any particular vendor Optimized for FPGA 3-stage hazard-free pipeline 256 registers implemented as a RAM block Only 30 distinct opcodes Clock frequencies of 100 MHz and above are achievable on most modern FPGAs Harvard architecture Separate instruction and data buses WISHBONE compatible Can use on-chip or external RAM Configurable Three multiplier options Optional instruction cache Optional divider Proven Comes with a verification environment (self-checking testbench) Used in commercial projects OpenCores Certified Project Open source Pe...
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